Samsung and SK Hynix hold less than 10 days of DRAM stock

KB Securities reported on September 7 that Samsung Electronics and SK Hynix together hold less than 10 days of finished DRAM inventory, a level no previous memory shortage cycle has reached. The report, echoed by TrendForce data showing global DRAM revenue surging 59.5% to US$154.73 billion in the second quarter, attributes the squeeze to the production of HBM4, which consumes three times the wafer capacity of standard DRAM.

The shortage is structural, not cyclical. HBM4’s 16‑die stacks and the multi‑year lead times for new EUV fabs mean supply cannot quickly respond. Enterprise buyers already face lead times above 40 weeks and quotes valid for just 48 to 72 hours.

HBM4 stacks 16 DRAM dies vertically, each drilled with approximately 2,048 through-silicon vias and bonded under heat and pressure. The process consumes roughly three times the wafer capacity of producing a conventional DDR5 chip, and Samsung and SK Hynix have been ramping it as fast as their fabs allow. As of September 7, according to KB Securities, the two companies together held less than 10 days of finished DRAM inventory — a buffer so thin that any supply disruption would cut it to zero within days.

The memory market has entered a shortage that is not about demand spikes but about the physics of making memory for AI. The same wafers that could have supplied servers and laptops are now being consumed by HBM4, and the replacements — new fabrication plants — are years from reaching meaningful output. The question is no longer whether prices will rise; it is whether the industry can supply enough to keep AI infrastructure growing at the pace its architects expect.

The numbers that quantify the squeeze

Kim Dong-won, head of research at KB Securities, warned in a September 7 report to Seoul Economic Daily that “Beyond a simple recovery in demand, a situation could arise in which the volume available for sale itself is depleted.” His report points to an inventory coverage of less than 10 days at Samsung and SK Hynix, compared with the 30‑to‑45‑day norm in healthy markets. The buffer is gone.

TrendForce’s Q2 2026 data shows why. Global DRAM revenue hit US$154.73 billion, up 59.5% from the previous quarter. Samsung captured 39.4% of that with US$60.98 billion, while SK Hynix held 24.9% at US$38.59 billion and Micron reached US$36.0 billion for a 23.3% share. Taiwanese makers Nanya, Winbond and PSMC also surged, absorbing overflow demand as the top three suppliers concentrated on high‑margin server and AI memory.

The mechanism behind the squeeze is straightforward. HBM4’s 16‑die stacks require through‑silicon vias, wafer thinning to tens of micrometers, and thermal‑compression bonding — steps that add yield risks conventional DDR5 never faces. One defective via or bonding fault can kill an entire stack, and the extra lithography and etch time per wafer erodes the available capacity for commodity DRAM. The sequence below maps the fabrication steps that turn a standard DRAM wafer into a 16‑high HBM4 stack — and why each one shrinks the industry’s margin for error.

In high‑bandwidth memory, SK Hynix still leads with about half of global HBM revenue in Q2 2026, but Samsung has rapidly closed the gap, lifting its share to roughly one‑third as HBM4 shipments ramp. Micron remains near one‑fifth but is strategically important to U.S. ecosystems seeking non‑Korean supply. Winning this race means long‑term pricing power and preferred supplier status for Nvidia‑class accelerators; falling behind risks margin compression and diminished bargaining power with hyperscalers.

The supply constraints are now being locked in by policy. South Korea on September 1 expanded its KR ECCN controls to cover high‑performance AI integrated circuits and advanced semiconductor manufacturing tools, while U.S. BIS rules already treat HBM above bandwidth‑density thresholds as controlled commodities. The table below shows the current export‑control landscape.

The buffer is gone, and the replacements are years away — that is not a pricing swing; it is a transfer of power from buyers to makers. TechInsights analyst Dan Hutcheson, however, holds a minority view that the shortage may moderate as a classic cyclical event within one to two years.

The structural forces that lock in the shortage

The capacity that could relieve the squeeze is not arriving quickly. SK Hynix’s M15X Cheongju fab started wafer production in Q1 2026 but will not add material capacity before mid‑2027. Samsung’s P5 facility is not expected until 2028, and Micron’s U.S. expansions face similar timelines. TrendForce models that incremental bit supply through 2027 will come from node migrations, not large new wafer starts, keeping conventional DRAM prices elevated even as quarterly increases moderate.

Meanwhile, the Stargate project — a multi‑year agreement among OpenAI, Samsung and SK Hynix to supply 900,000 DRAM wafers per month — has reportedly slowed on its Korean leg, a risk flagged by KB Securities. Yet the broader demand signal remains overwhelming: hyperscaler AI infrastructure spending is projected to reach about US$1.3 trillion in 2027, and memory’s share of that spending is expected to rise to 57% from 14% in 2024.

The July selloff that briefly erased confidence in Korean memory stocks has reversed. On Monday, SK Hynix shares rose 8.3% to ₩1,783,000 and Samsung gained 5.7% to ₩270,000, as investors read the inventory warning as confirmation of pricing power. That rally came after both stocks had dropped about 38% from three‑month peaks, a rout Indoneo covered in July. The next opportunity to break the pattern won’t come until mid‑2027, when new fabs begin to add wafer capacity. Until then, the buffer the industry once relied on remains absent, and the decisions about who gets memory are made in Seoul.

Beyond the headline

The Money Trail

The economic fulcrum in this story is not just higher chip prices but who captures the cash flows from AI’s hardware bottlenecks. As HBM4 pulls disproportionate wafer capacity away from commodity DRAM, margin pools shift upstream to the few firms that can reliably supply stacked memory at scale. Hyperscalers, GPU vendors and AI platforms become price takers on memory, while Korean and U.S. suppliers with export licenses and proven HBM stacks can convert scarcity into multi‑year earnings visibility and shareholder returns.

The Timing

The warning arrives at a moment when several structural clocks have converged: OpenAI‑class model launches have accelerated agentic AI adoption, export‑control regimes have constrained where new capacity can be deployed, and Korean regulators have just tightened licensing for advanced chips and tools. That combination means the current quarter’s inventory squeeze is being locked in by both demand and policy at once, making this shortage cycle more than a typical pricing upturn and giving 2026–2027 outsized importance for future AI infrastructure maps.

The Reach

One non‑obvious impact falls on Western cloud providers that rely on long‑term supply agreements rather than spot purchases. As HBM4 takes three times the wafer capacity of standard DRAM and Korean export licensing tightens for advanced chips, U.S. hyperscalers’ ability to expand data‑center footprints becomes contingent on a small group of memory producers’ allocation decisions. That dependency can ripple into project timing for AI‑heavy services, influencing when new features roll out and how quickly enterprises can scale agentic workloads.

What the memory squeeze means for your decisions

With DRAM inventory at historic lows and HBM4 capacity locked in through 2027, the shortage is shifting from a supply‑chain issue to a strategic one. Here is what it means for four groups of readers.

• Western Semiconductor Procurement Manager

  You must immediately re‑evaluate your 2027 DRAM and HBM procurement strategies. Lead times above 40 weeks and quotes valid for only 48–72 hours mean that spot buying is no longer viable. Lock in long‑term contracts now, and consider design changes that reduce reliance on the most constrained memory types. Review Micron’s investor‑relations presentations for capacity allocation signals.

• US-based Investor with APAC Semiconductor Exposure

  Assess your portfolio’s exposure to Samsung, SK Hynix and Micron. The inventory shortage supports sustained pricing power and potential re‑ratings for memory producers, but rising input costs could pressure downstream tech companies. Monitor the Q3–Q4 earnings calls for HBM4 yield disclosures and capex guidance; if yields improve faster than expected, the shortage may ease sooner than feared.

• Western Cloud Provider Executive

  Review your AI data center expansion plans. HBM4’s wafer intensity means that even committed capacity may not translate into timely deliveries. Engage directly with memory suppliers for long‑term allocation commitments, and model the impact of rising memory costs on your service pricing and profitability through 2027.

• US Government Export Control Policy Analyst

  Analyze South Korea’s amended strategic items list, effective September 1, to identify opportunities for greater policy alignment. The new KR ECCN categories for AI chips and equipment mirror U.S. BIS rules, but the combined effect on global semiconductor supply chains and the ability of Western allies to secure adequate HBM supply for AI infrastructure warrants close monitoring.

FAQ

Explainer

HBM4

High Bandwidth Memory 4 is the fourth generation of stacked DRAM designed for AI accelerators and high‑performance computing. It stacks 16 dies vertically, up from 12 in HBM3E, and delivers enormous bandwidth by connecting them with through‑silicon vias. The 16‑die stack consumes roughly three times the wafer capacity of standard DDR5, making it both indispensable and supply‑constrained.

Through‑silicon via (TSV)

A vertical electrical connection drilled through a silicon die. In HBM4, thousands of TSVs per die are etched, insulated, and filled with copper to create signal and power paths between stacked layers. A single defective TSV can kill an entire 16‑die stack, making TSV yield a critical manufacturing bottleneck.

EUV lithography

Extreme ultraviolet lithography uses light at a 13.5 nm wavelength to pattern the finest features on advanced chips. It is essential for the dense DRAM cells and TSV layouts in HBM4. New EUV fabs take years to build and cost billions, creating a long lead time between investment and additional wafer supply.

KR ECCN

Korea’s Export Control Classification Number system, modeled on the U.S. ECCN, categorizes strategic items for export licensing. The September 2026 amendment added categories 3A501–3A504 for high‑performance AI integrated circuits and 3B501–3B504 for advanced semiconductor manufacturing equipment, bringing Korean rules closer to U.S. and EU dual‑use regimes.

Stargate

A multi‑year AI infrastructure project anchored by OpenAI, with Samsung and SK Hynix signing a letter of intent in October 2025 to supply 900,000 DRAM wafers per month. The Korean leg of the project has reportedly slowed, but the overall commitment underscores the scale of memory demand AI infrastructure is creating.